AI for Chips and Chips for AI | CEMSE Graduate Seminar

This graduate seminar at KAUST CEMSE explored the theme "AI for Chips and Chips for AI," with a focus on how automation and open infrastructure can speed up mixed-signal and AI-accelerator development.

The discussion connected agentic layout automation with hardware-software co-design, showing how early architectural choices affect time-to-first-token, energy, and silicon cost for edge AI.

Highlights

• Agentic layout and verification for faster iteration.
• Open-source infrastructure that scales across projects.
• Co-designed accelerators tuned for efficient edge inference.